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SM802141 clockworks ? selectable 62.5mhz, 125mhz, 156.25mhz and 312.5mhz ultra-low jitter, lvpecl frequency synthesizer clockworks is a trademark of micrel, inc. micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 ( 408 ) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micrel.com april 2012 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 general description the SM802141 is a part of micrel?s clockworks ? family of devices and provides an extremely low-noise timing solution for ethernet clock signals. the device operates from a 3.3v or 2.5v power supply and synthesizes differential lvpecl output clocks at 62.5mhz, 125mhz, 156.25mhz or 312.5mhz, selectable through logic control pins. the SM802141 accepts a 25mhz crystal or lvcmos reference clock. data sheet and support documentation can be found on micrel?s web site at: www.micrel.com . features ? configurable to generate up to four different lvpecl clock frequencies ? 2.5v or 3.3v operating range ? typical phase jitter @ 125mhz (12khz to 20mhz): 255 fs rms ? industrial temperature range (?40 ? c to +85 ? c) ? green, rohs, and pfos compliant ? available in 24-pin 4mm ? 4mm qfn package applications ? ethernet phy ? storage networking (san, nas) block diagram
micrel, inc. SM802141 april 2012 2 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 ordering information (1) part number marking shipping temperature range package SM802141umg 802141 tube ?40 ? c to +85 ? c 24-pin qfn SM802141umgtr 802141 tape and reel ?40 ? c to +85 ? c 24-pin qfn note: 1. devices are green, rohs, and pfos compliant. pin configuration 24-pin qfn (top view) pin description pin number pin name pin type pin level pin function 19, 20 /q1, q1 o, (dif) lvpecl differential clock output from bank 1, 156.25mhz or 312.5mhz. 22, 23 /q2, q2 o, (dif) lvpecl differential clock output from bank 2, 62.5mhz or 125mhz. 24 vddo2 pwr power supply for output bank 2. 2 vsso2 pwr power supply ground for output bank 2. 3 pll_bypass i, (se) lvcmos pll bypass, selects output source, 0 = normal pll operation, 1 = output from i nput reference clock or crystal 45k ? pull-down. 4 xtal_sel i, (se) lvcmos selects pll input reference source (0 = ref_in, 1 = xtal, 45k ? pull-up).
micrel, inc. SM802141 april 2012 3 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 pin description (continued) pin number pin name pin type pin level pin function 5, 11, 16, 18 test factory test pins . do not connect anything to these pins. 1 vdd pwr core power supply . 13, 14, 15 vss (exposed pad) pwr core power supply ground. the exposed pad must be connected to the vss ground plane. 17 vddo1 pwr power supply for output bank 1. 21 vsso1 pwr power supply ground for output bank 1. 8 ref_in i, (se) lvcmos reference clock input. 9 xtal_in i, (se) xtal crystal reference input. no load caps needed (see figure 5). 10 xtal_out o, (se) xtal crystal reference output. no load caps needed (see figure 5). 6 fsel i, (se) lvcmos frequency select, 1 = 312.5/125 mhz, 0 = 156.25/62.5mhz, 45k ? pull-up. 7 oe1 i, (se) lvcmos output enable, q1 disables to tri-state, 0 = disabled, 1 = enabled, 45k ? pull-up. 12 oe2 i, (se) lvcmos output enable, q2 disables to tri-state, 0 = disabled, 1 = enabled, 45k ? pull-up. truth table pll_bypass xtal_sel oe1 oe2 input output 0 ? 1 1 ? pll 1 ? 1 1 ? xtal/ref_in ? 0 1 1 ref_in ? ? 1 1 1 xtal ? ? ? 0 1 ? q1 tri-state ? ? 1 0 ? q2 tri-state output selection table xtal_sel pll_bypass f sel oe1 oe2 div 1 div 2 q1 q2 l h x h l x x reference input hi-z h (default) h x h l x x 25 hi-z h (default) l (default) h (default) h l 10 25 312.5 hi-z h (default) l (default) h (default) l h 10 25 hi-z 125 h (default) l (default) l h l 20 50 156.25 hi-z h (default) l (default) l l h 20 50 hi-z 62.5
micrel, inc. SM802141 april 2012 4 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) supply voltage (v dd , v ddo1/2 ) ......................................+4.6v input voltage (v in ) .............................. ? 0.50v to v dd + 0.5v lead temperature (sol dering, 20s )............................ 260c case temper ature ..................................................... 115c storage temperature (t s ) ......................... ? 65 ? c to ? 150c operating ratings (2) supply voltage (v dd , v ddo1/2 )............... +2.375v to +3.465v ambient temperature (t a ) .......................... ?40c to +85c junction thermal resistance (3) qfn ( ? ja ) still-air ......................................................... 50c/w qfn ( ? jb ) junction-to-board ....................................... 30c/w dc electrical characteristics (4) v dd = v ddo1, 2 = 3.3v ? 5% or 2.5v ? 5% v dd = 3.3v ? 5% & v ddo1,2 = 3.3v ? 5% or 2.5v ? 5% t a = ? 40 ? c to ? 85 ? c. symbol parameter condition min. typ. max. units v dd , v ddo1/2 2.5v operating voltage 2.375 2.5 2.625 v v dd , v ddo1/2 3.3v operating voltage 3.135 3.3 3.465 v 62.5mhz; 1 output enabled 80 125mhz; 1 output enabled 86 156.25mhz; 1 output enabled 88 i dd xtal supply current v dd + v ddo xtal_sel = 1 outputs open 312.5mhz; 1 output enabled 97 125 ma lvpecl output dc elect rical characteristics (4) v dd = v ddo1, 2 = 3.3v ? 5% or 2.5v ? 5% v dd = 3.3v ? 5% & v ddo1, 2 = 3.3v ? 5% or 2.5v ? 5%, t a = ? 40 ? c to ? 85 ? c, r l = 50 ? to v ddo ? 2v symbol parameter condition min. typ. max. units v oh output high voltage v ddo ? 1.145 v ddo ? 0.97 v ddo ? 0.845 v v ol output low voltage v ddo ? 1.945 v ddo ? 1.77 v ddo ? 1.645 v v swing output voltage swing 0.6 0.8 1.0 v notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional oper ation is not implied at conditions other than those detailed in the operational sections of this data shee t. exposure to absolute maximum rating con ditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if t he device is operated beyond the operating ratings. 3. package thermal resistance assumes exposed pad is soldered (o r equivalent) to the devices most negative potential on the pcb . 4. the circuit is designed to meet the ac and dc specifications shown in the above table(s) after thermal equilibrium has been established.
micrel, inc. SM802141 april 2012 5 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 lvcmos (pll_bypass, xtal _sel, oe1/2, fsel) dc electrical characteristics (4) v dd = 3.3v ? 5%, or 2.5v ? 5%, t a = ? 40 ? c to ? 85 ? c. symbol parameter condition min. typ. max. units v ih input high voltage 2 v dd + 0.3 v v il input low voltage ? 0.3 0.8 v i ih input high current v dd = v in = 3.465v 150 ? a i il input low current v dd = 3.465v, v in = 0v ? 150 ? a ref_in dc electrical characteristics (4) v dd = 3.3v ? 5%, or 2.5v ? 5%, t a = ? 40 ? c to ? 85 ? c. symbol parameter condition min. typ. max. units v ih input high voltage 1.1 v dd + 0.3 v v il input low voltage ? 0.3 0.6 v xtal_sel = v il , v in = 0v to v dd ? 5 5 ? a i in input current xtal_sel = v ih , v in = v dd 20 a crystal characteristics parameter condition min. typ. max. units mode of oscillation 10pf load fundamental, parallel resonant frequency 25 mhz equivalent series resistance (esr) 50 ? shunt capacitor, c0 1 5 pf correlation drive level 10 100 uw
micrel, inc. SM802141 april 2012 6 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 ac electrical characteristics (4, 5) v dd = v ddo1/2 = 3.3v ? 5% or 2.5v ? 5% v dd = 3.3v ? 5% & v ddo1, 2 = 3.3v ? 5% or 2.5v ? 5% t a = ? 40 ? c to ? 85 ? c, r l = 50 ? to v ddo ? 2v symbol parameter condition min. typ. max. units f out1 output frequency 1 (7) xtal_sel = h, fsel =x, oe1 = h, oe2 = l, pll bypass = h 25 mhz f out2 output frequency 2 (7) xtal_sel = h, fsel =1, oe1 = h, oe2 = h, pll bypass = l 312.5/ 125 mhz f out3 output frequency 3 (7) xtal_sel = h, fsel =0, oe1 = h, oe2 = h, pll bypass = l 156.25/ 62.5 mhz f out4 output frequency 4 (7) xtal_sel = l, fsel =x, oe1 = h, oe2 = l, pll bypass = h ref_in mhz f ref reference input frequency 25 mhz t r /t f lvpecl output rise/fall time 20% ? 80% 80 175 350 ps odc output duty cycle 48 50 52 % t lock pll lock time 20 ms t jit ( ? ) rms phase jitter (6) 25mhz integration range (12khz ? 5mhz) 62.5mhz integration range (12khz ? 10mhz) 125mhz integration range (12khz ? 20mhz) 156.25mhz integration range (12khz ? 20mhz) 312.5mhz integration range (12khz ? 20mhz) 240 315 255 245 250 fs rms spurious noise components 12.5mhz using 62.5mhz 25mhz using 125mhz 6.25mhz using 156.25mhz 25mhz using 156.25mhz 12.5mhz using 312.5mhz -76 -80 -82 -62 -79 dbc notes: 5. all phase-noise measurements were taken with an agilent 5052b phase-noise system. 6. measured using 25mhz crystal as the i nput reference source. if using an external reference input, use a low phase-noise sour ce. with an external reference, the phase noise will follow t he input source phase noise up to about 1mhz. 7. when output bank q1 and output bank q2 are exter nally tied together. refer to output selection table.
micrel, inc. SM802141 april 2012 7 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 application information input reference when operating with a crystal input reference, do not apply a switching signal to ref_in. crystal layout keep the layers under the crystal as open as possible and do not place switching signals or noisy supplies under the crystal. crystal load capacitance is built inside the die so no external capacitance is needed. see the selecting a quartz crystal for the cloc kworks flex i family of precision synthesizers application note for further details. contact micrel?s hbw applic ations group if you need assistance on selecting a suitable crystal for your application at hbwhelp@micrel.com . parallel outputs to achieve four frequencies four frequencies, 62.5mhz, 125mhz, 156.25mhz and 312.5mhz can be achieved in one output channel by shorting q1 and q2 outputs together at the device pins. frequency selection is achieved using fsel, oe1 and oe2 pins as outlined in the output selection table.
micrel, inc. SM802141 april 2012 8 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 phase noise plots phase noise plot: 25mhz, 12khz ? 5mhz, 241 fs rms phase noise plot: 62.5mhz, 12khz ? 10mhz, 315 fs rms
micrel, inc. SM802141 april 2012 9 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 phase noise plots (continued) phase noise plot: 125mhz, 12khz ? 20mhz, 254 fs rms phase noise plot: 156.25mhz, 12khz ? 20mhz, 244 fs rms
micrel, inc. SM802141 april 2012 10 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 phase noise plots (continued) phase noise plot: 312.5mhz, 12khz ? 20mhz, 248 fs rms
micrel, inc. SM802141 april 2012 11 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 figure 1. duty cycle timing figure 2. all outputs rise/fall time figure 3. rms phase noise jitter
micrel, inc. SM802141 april 2012 12 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 figure 4. lvpecl output load and test circuit figure 5. crystal input interface
micrel, inc. SM802141 april 2012 13 m9999-041812-a hbwhelp@micrel.com or (408) 955-1690 package information 24-pin qfn micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com micrel makes no representations or warranties with respect to t he accuracy or completeness of the information furnished in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for it s use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether expre ss, implied, arising by estoppel or other wise, to any intellectual property rights is granted by this document. except as provided in micrel?s terms and conditions of sale for such products, mi crel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including l iability or warranties relating to fitness for a particular purpose, merchantability, or infringement of an y patent, copyright or other intellectual p roperty right. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a product can reasonably be expected to result in pers onal injury. life support devices or system s are devices or systems that (a) are in tended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significan t injury to the user. a purchaser?s use or sale of micrel produc ts for use in life support app liances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2012 micrel, incorporated.

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